tilelang.engine.phase¶

Functions¶

`allow_warp_specialized`([pass_ctx, target])
`allow_tma_and_warp_specialized`([pass_ctx, target])
`allow_fence_proxy`([target])
`allow_vectorize`([pass_ctx])
`allow_global_thread_synchronization`([pass_ctx])
`should_enable_aggressive_merge`([pass_ctx, target])
`should_force_let_inline`([pass_ctx])
`PreLowerSemanticCheck`(mod)	Check whether the module is valid before lowering. If not, raise a user-friendly error
`LowerAndLegalize`(mod, target)	Bind target information and progressively legalize and lower frontend Tile IR into a form suitable for downstream optimization and codegen.
`OptimizeForTarget`(mod, target)

Module Contents¶

tilelang.engine.phase.allow_warp_specialized(pass_ctx=None, target=None)¶

Parameters:

pass_ctx (tilelang.transform.PassContext | None)
target (tvm.target.Target | None)

Return type:

bool

tilelang.engine.phase.allow_tma_and_warp_specialized(pass_ctx=None, target=None)¶

Parameters:

pass_ctx (tilelang.transform.PassContext | None)
target (tvm.target.Target | None)

Return type:

bool

tilelang.engine.phase.allow_fence_proxy(target=None)¶

Parameters:: target (tvm.target.Target | None)
Return type:: bool

tilelang.engine.phase.allow_vectorize(pass_ctx=None)¶

Parameters:: pass_ctx (tilelang.transform.PassContext | None)
Return type:: bool

tilelang.engine.phase.allow_global_thread_synchronization(pass_ctx=None)¶

Parameters:: pass_ctx (tilelang.transform.PassContext | None)
Return type:: bool

tilelang.engine.phase.should_enable_aggressive_merge(pass_ctx=None, target=None)¶

Parameters:

pass_ctx (tilelang.transform.PassContext | None)
target (tvm.target.Target | None)

Return type:

bool

tilelang.engine.phase.should_force_let_inline(pass_ctx=None)¶

Parameters:: pass_ctx (tilelang.transform.PassContext | None)
Return type:: bool

tilelang.engine.phase.PreLowerSemanticCheck(mod)¶

Check whether the module is valid before lowering. If not, raise a user-friendly error in Python side instead of letting the error dive into the complicated TVM/C++ stack. Note: This is a validation-only pipeline of passes and does not modify or return the module.

Parameters:: mod (tvm.IRModule)
Return type:: None

tilelang.engine.phase.LowerAndLegalize(mod, target)¶

Bind target information and progressively legalize and lower frontend Tile IR into a form suitable for downstream optimization and codegen.

This pass pipeline: - Binds the provided target to the module. - Legalizes frontend Tile IR into TVM-compatible constructs. - Simplifies expressions. - Configures reducer layouts and performs layout inference for fragments and shared memory. - Lowers high-level tile operations and L2 persistent maps. - Legalizes vectorized loops and inserts safety checks for memory accesses. - Re-simplifies to remove redundancies introduced by safety checks. - Attempts loop vectorization for dynamic-shaped loops.

Parameters:

mod (IRModule) – The input IR module containing frontend Tile IR.
target (Target) – Target device information to bind into the module.

Returns:

The transformed module, ready for target-specific optimization passes.

Return type:

IRModule

tilelang.engine.phase.OptimizeForTarget(mod, target)¶

Parameters:

mod (tvm.IRModule)
target (tvm.target.Target)

Return type:

tvm.IRModule